VHDL PROGRAM FOR 4-bit BINARY COUNTER IN STRUCTURAL STYLE-IC 7493

library ieee;
use ieee.std_logic_1164.all;
entity ic7493 is
port(clk,mr1,mr2,sd_l:in bit;
q:inout bit_vector(3 downto 0));
end ic7493;

architecture ic7493_arch of ic7493 is
component notgate
port(a:in bit; b:out bit);
end component;

component nandgate
port(a,b:in bit; c:out bit);
end component;
component jkff
port(j,k,clk,sd_l,rd_l:in bit;
q:inout bit);
end component;
signal j1,k1:bit:='1';
signal mr_l:bit;

begin
L1:nandgate port map(mr1,mr2,mr_l);

L5:jkff port map(j1,k1,clk,sd_l,mr_l,q(0));
L6:jkff port map(j1,k1,q(0),sd_l,mr_l,q(1));
L7:jkff port map(j1,k1,q(1),sd_l,mr_l,q(2));
l8:jkff port map(j1,k1,q(2),sd_l,mr_l,q(3));
end ic7493_arch;